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JEDEC
semiconductor test methods and standards setting organization, Joint Electron Device Engineering Council.
See Also: UFS
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Post Wire and Die Bond Inspection Machine
IV-T3300
IV-T3300 is a post wire and die bond inspection machine with Dual JEDEC Tray Feeder System. It features a large inspection area of 600x500mm and a quick trays change of 5-7 seconds.
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NAND Controller IP
ONFI
Arasan is the leading supplier of mobile storage IP and its products are used by most first tier memory suppliers. Arasan's deep experience with NAND flash memory interfaces and mobile storage standards began in 2001 when it joined the SD Association and shipped industry first SD card IP in 2003. Arasan is a current member of ONFI and JEDEC.
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±6 kV ANSI/ESDA/JEDEC 2-Pin HBM Tester
HBM-S1-B
High Power Pulse Instruments GmbH
*±6 kV Human-Body-Model (HBM) 2-pin tester according ANSI/ESDA/JEDEC JS-001 standard with C = 100 pF, R = 1.5 kΩ discharge network*True HBM: the classical discharge network of the HBM-S1-A according the standard ensures compliant waveforms for all load conditions*Optionally available upgrade for all HPPI TLP-3010C, 4010C, 8010A, and 8010C hardware systems and software (upgrade on request)*Suppression of trailing pulses*Integrated 10 kΩ charge removal resistor*Integrated DUT voltage and DUT current sensor for real time voltage and current monitoring*Integrated DC test DUT switchIntegrated hardware 50 Ω trigger output for high speed digital oscilloscopesIntegrated overvoltage protection of voltage sense and DC test interfaces for oscilloscope and SMU protection during high voltage HBM testing*Fast and efficient HBM measurements including transient waveform data management using the HPPI TLP software*Compact size 145 mm x 82.5 mm x 44 mm
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QFP-to-PGA JEDEC 132-Position, 0.025 [0.64] Pitch Adaptor
95-132I25
QFP to PGA Adapter for JEDEC 132 Position, .025 [.64] Pitch. Reduce costs by using less expensive QFP packages to replace PGA footprints in existing designs. Pins are mechanically fastened and soldered to board using Aries patented process, creating a reliable electrical connection and rugged contact.
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Walk-In Climatic Test Chamber
WEIBER climatic test chamber is ideally suited for specimen test requiring quick changes of temperature. It covers various applications from JEDEC and IEC test standards. The climatic chamber is equipped with advanced technology such as specimen temperature control which allows linear specimen temperature rates of change during rapid thermal cycling or accurate temperaThe walk in option provides facility to test large sized, heavy weight specimen as well as the facility to test the specimen in bulk. Capacities ranging from 2000 to 10,000 Lt are available. Standard as well as customizable sizes and facilities are provided.
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IP Solution
eMMC 5.1
Demand for mobile content capacity and bandwidth for video, pictures and music is ever increasing. To address this demand in the next generation of smartphones, tablets, and portable devices, the eMMC 5.1 Specification from JEDEC, improves the current HS400 speeds operating at 3.2Gbps, with "command queuing" making the data transfers highly efficient by offloading the software overhead into the controller. eMMC 5.1 further improves the reliability of operation by utilizing an "enhanced strobe" at the PHY layer. The eMMC5.1 is backward compatible with the existing eMMC 4.51 and eMMC 5.0 Devices.
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test measurement unit
ITC59100 Rg/Qg
The ITC59100 Test Measurement Unit (TMU), which plugs into the ITC59000 Test Platform, performs gate charge (Qg) measurements that conform to MIL-STD-750C, Notice 2, Method 3471 and JEDEC Standard JESD24-2. In addition the ITC59100 TMU performs an internal gate resistance (Rg) test method that conforms to JEDEC Standard JESD24-11.
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Programmable Read Only Memory (PROM)
Is a Static Random Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide standard, which allows easy memory board layouts which accommodate a variety of industry standard ROM, PROM,EPROM, EEPROM and RAMs.
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PLCC-to-PGA JEDEC Type 0.050 [1.27] Pitch Adaptor
Series 505
PLCC to PGA Adapter for JEDEC Type .050 [1.27] Pitch Devices.
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DDR4 Parametric Test Reference Solution
Keysight's DDR4 parametric test reference solution helps verify the signal integrity of DDR4 memory designs according to JEDEC specifications.
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Climate Control Test Chamber
ACMAS's Climate Test Chamber is ideally suited for specimen test requiring quick changes of temperature. It covers various applications from JEDEC and IEC test standards. ACMAS Thermal Cyclic Chamber is equipped with advanced technology such as specimen temperature control which allows linear specimen temperature rates of change during rapid thermal cycling or accurate temperature ramp control. This chamber is also known as Climatic Test Chamber and Climate Controlled Test Chamber.
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ESD & Latch-Up Test Service
MASER Engineering has automatic test equipment for the most common ESD test pulse models. MIL - JEDEC - ESDA - IEC standards. IC level Human Body Model. IC level Machine Model. IC level Charged Device Model. System level IEC 61000 HBM. AEC-Q100 Field Induced Gate Leakage test. Static Latch-Up test. Dynamic Latch-Up test.
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JEDEC TO Collet Socket
Series 514
TO Collet Sockets. Aries TO sockets feature molded chamfer lead-ins for easy device insertion. High stand-off design for heat dissipation and easy cleaning. External polarization for positive location.
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mSAT SSD for Industrial Embedded Applications
mSATA SSD Series
ADLINK’s mSATA SSD Series with the SATA 6Gb/s interface is fully compliant with the standard mSATA form factor, also known as JEDEC MO300. Utilizing Toggle 2.0 MLC flash technology, capacities of up to 1TB are available with support for read/write speeds of up to 550MB/sec and 500MB/sec respectively . Additionally, the power consumption of the ADLINK’s mSATA modules is much lower than that of traditional hard drives.
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Wafer ESD Tester lineup
Hanwa Electronic Ind. Co.,Ltd.
◆Correspond to 300mm Wafer. This tester can measure LED or the large sizes Wafer, such as a system LSI. And Zap of HBM/MM can be performed. The Automatic destructive judging by V/I measurement can also be performed after Zap.◆Waveform guarantee in Zap needles. HED-W5100D carries out the calibration before shipment in the place of Zap needles. Therefore, Correlation of the Result of a Package Device becomes clear easily.◆Correspondence to Standards This Tester corresponds to the Standard of JEITA, ESDA, and JEDEC. A Zap unit adopts the plug-in system and also has the waveform of Customer's requests.◆Connection with TLP This Tester is the best for TLP Testing with deep relation of ESD. The protection circuit of a device with an ESD problem is investigated.
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Flash SATA Disk /mSATA SATA 3 SLC,MLC
FSA 300 Series
*SATA III (6.0Gb/s) interface*Capacity: SLC 1 GB to 64 GB, MLC 4 GB to 128 GB*iSMART disk health monitoring*Intelligent error recovery system*Write protection security*Anti-vibration mechanical design*Excellent data transfer speed*Zero mechanical interference*JEDEC standard MO-300B dimension
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Memory Tester for DDR4 DIMMS
RAMCHECK LX
USBWith the RAMCHECK LX DDR4 memory tester package (part number INN-8686-DDR4) you can quickly test and identify DDR4 DIMMs that comply with JEDEC standards. Tests are fast, reliable and easy to do. The RAMCHECK LX DDR4 package includes the RAMCHECK LX base tester and 288-pin DDR4 DIMM adapter. (This package is also available with the DDR4 DIMM Pro adapter, featuring a very rugged test socket).
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ESD & Latch-Up Test System
Identify and help correct ESD and latch-up susceptibility issues on sensitive integrated circuit components prior to full-scale production with the Thermo Scientific™ MK.2-SE ESD and Latch-Up Test System. The MK.2-SE test system provides advanced capabilities to test high pin count IC devices to Human Body Model (HBM) and Machine Model (MM) ESD standards. The system’s pulse delivery design addresses wave form hazards such as trailing pulse and pre-discharge voltage rise, and performs Latch-Up testing per the JEDEC EIA/JESD 78 Method.
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Surface Mount-to-DIP JEDEC SOT-25, SOT-23A-6 Adaptor
1110748
Surface Mount to DIP Adapter for SOT-25, SOT-23A-6. Allows for breadboarding or substitution of microgate SOT-23A-6 and SOT-25 IC and transistor packages into .100 [2.54] pitch proto boards or PC boards. Solder masked top-side pads allow user to hand solder devices directly to topside of adapter with fewer problems of solder bridging. Longer male bottom pins are available at special request for easy use of probe clips. Large topside pads allow for soldering test pins, jumpers, etc. to top of adapter.
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Semiconductor Package Wind Tunnel
WT-100
Thermal Engineering Associates, Inc.
The WT-100 Forced Convection (Moving Air) Wind Tunnel is designed in accordance with the EIA/JEDEC JESD51-6 standard for thermal characterization of semiconductor packages and devices. The vertical design minimizes laboratory floor space requiements. Air is drawn in at the bottom and exhausts at the top. The test section is large enough to accommodate the largest JEDEC and SEMI thermal test boards. Air velocity can be adjusted over the range of 0.5 to 5 m/s; air velocity is monitored with an included hot-wire anemometer connected to a digital display. A Type-T thermocouple is mounted in the test section for monitoring the moving air temperature.
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Detective Logic Analyzer
LPDDR3
Provides logic analyzer like deep transaction Listing and Waveform captureCan store up to 1G of captured States at 1600MT/sContinuous, real time analysis, not post-processingEye Detector guarantees valid data acquisitionExtensive Triggering and Storage Qualification allows precise insightProtocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specificationsMode Register Listing providedSupports Auto-Clock rate detect and clock stoppageConnects to the target under test with Flying Lead, BGA interposers or a midbus probeIntegrated Microsoft Charts gives quick insight into large trace capturesTrigger In & Out allows the Detective to integrate with other test tools
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DDR4 Pro 288-Pin DIMM Adapter
INN-8686-18-PRO
Your best option if you need to test a large volume of memory! The RAMCHECK LX DDR4 Pro 288-pin DIMM Adapter (p/n INN-8686-18-PRO) gives RAMCHECK LX users the power to test 288-pin DDR4 modules, including unbuffered (UDIMM), load-reduced (LR-DIMM) and registered modules (RDIMM), both ECC and non-ECC, that comply with JEDEC standards. It includes the DDR4 Series adapter and DDR4 Pro DIMM test head.
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Sideband Bus Protocol Analyzer
FS2700 DDR5
The FS27xx DDR5 Sideband Bus Protocol Analyzer is the latest DDR5 tool from FuturePlus Systems. FuturePlus has taken the complexity of 8 different JEDEC specifications and ported them into this very useful tool. DDR5 Validation Engineers and system integrators will not have to comb through complex specifications defining thousands of bits and register addresses. The tool takes care of this. Please request our data sheet for more information.
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High Performance Chipscale Test Sockets
SC
Ardent Concepts Test Sockets for ATE test deploy patented SC Contact Sets. This technology is capable of over 2 Million mechanical insertions in production environments and uses easy to replace pins with no complicated assembly procedure. It is designed to be drop-in compatible with 1mm offset and straight through footprints to ease implementation, and RC SC’s simple and robust design is extremely cost effective when compared with existing “roll” type test contactors and sockets. Designed specifically for JEDEC QFN and MLF applications, SC High Performance Test Sockets are available for most handler set-ups and offer exceptional AC performance.
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DIP-to-JEDEC TO Adaptor Socket
1109522 & 1109523
DIP to TO Adapter Sockets. 8 pin DIP IC socket on the top and a circular, 8 pin TO can male pin footprint on the bottom. ICs now available only in 8 pin DIPs can be readily mounted on boards having TO thru-hole footprints without having to redesign the board.
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HBM Discharge Simulator
PSD-510
The PSD-510 is a low cost, light weight, battery powered Human Body Model (HBM) simulator designed to help customers determine the HBM ESD sensitivity of a device in accordance with ANSI/ESDA/JEDEC JS-001.
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LPDDR
A large number of LPDDR sockets have been developed to cover the wide variety of ball I/O configurations. This catalog supports the JEDEC 209 Standard configuration.
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Thermal Test Boards
Thermal Engineering Associates, Inc.
TEA offers a series of thermal test boards for package characterization and design comparison that conform to to the JEDEC JESD51 standards. The board family, referred to as the TTB-1000 series, consists of two different standard sizes designed to cover a wide range of package sizes. These boards, also referred to as test coupons, provide a well defined mounting environment, will withstand temperatures to 125 oC, and have lead lands terminated in eyelets to allow for hand-wired connection to the board edge contacts. The board mates with a dual 18-pin, 3.962 mm (0.156") pitch edge-card connector.
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Detective Logic Analyzer
LPDDR5
Provides logic analyzer like deep transaction Listing and Waveform capture. Can store up to 512M of captured States at up to 6400+ MT/sContinuous, real time analysis, not post-processing 2D (voltage & time) Eye Detector guarantees valid data acquisition on each signalExtensive Triggering and Storage Qualification allows precise insightIndustry Leading Protocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specifications, NOT post processing. No other tool can provide this!Mode Register Listing provided
