Bitstream
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Product
HEVC Bitstream Validation
Parabola Verifier
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Parabola Verifier is a powerful but lightweight software tool for the validation and checking of HEVC bitstreams and assurance of conformance to the standard. With hundreds of different syntax, semantics and data dependency checks, Verifier is designed to provide confidence that encoded bitstreams are wholly compliant in every testable aspect.
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Product
Advanced General Purpose FPGA
CertusPro-NX
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*Up to 100K logic cells, 7.3 Mb of embedded memory blocks (EBR, LRAM), 156 18 x 18 multipliers, 299 programmable I/O, 8 SERDES supporting up to 10.3 Gbps per lane and supporting popular protocols (10 Gig Ethernet, PCIe Gen 3, DisplayPort, SLVS-EC and CoaXPress).*Packages as small as 9x9 mm, and in ball-pitch options of 0.5, 0.8 and 1.0 mm.*Power modes – User selectable Low Power vs. High Performance modes, enabled by FD-SOI programmable back-bias.*Design security – ECDSA bitstream authentication, coupled with robust AES-256 encryption.*Fast configuration – I/O configures in 4 ms, and full-device in under 30 ms in 100K LC device.
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Product
WAN Adapters
FarSync T4Ee
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The FarSync T4Ee PCIe card is the top of the range intelligent 4 port transparent synchronous / bitstream / asynchronous card with many line signalling and multiple clock sourcing options. A PCI version is also available.
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Product
HEVC Bitstream Analyzer
Parabola Explorer
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Parabola Explorer is a comprehensive bitstream analyzer for HEVC. It gives an unrivalled insight into inner codec workings via an intuitive user interface backed with powerful, multi-faceted analysis of video bitstreams.
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Product
Decoder Compliance Tests
Sarnoff Bitstreams™
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Using SRI’s Emmy® award-winning technology, the Sarnoff® Bitstreams™ suite is the de facto standard for systematically and unambiguously testing decoders against industry standards. The Bitstreams visual and automated decoder tests work in a matter of seconds and do not require a reference signal or specialized decoder.
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Product
WAN Adapters
FarSync SDK Developers Toolkit
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The SDK supports writing applications to use the FarSync range of products on both Linux and Windows. It contains documentation, working sample applications, user libraries and test utility applications. There is everything a user needs to rapidly develop and test a wide variety of applications using synchronous (HDLC framed) protocols, V.120, LAPB, asynchronous data or transparent bitstreams including Audio, G.704, MPEG Video T-DMB, DAB STI and DAB ETI with the bitstream encoder and decoders provided.
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Product
HEVC Video Analyzer
Zond 265
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Zond 265 is the first-to-market tool for the visual in-depth analyzing of HEVC/H.265 video bitstreams. It is intended to help video developers and researchers in codec development, easily isolate and identify visual artifacts or problems with bitstream compliance, and see the encoding elements of video data.
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Product
PLD ISP Feature, GTE 10.00p
K8220A
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The PLD ISP feature allows the test developer engineer to specify a configuration bitstream file in VCL digital test file, much like programming a Flash memory device. The PLD ISP feature supports multiple PLD configuration data formats are supported including. Serial Vector Format (SVF), Standard Test And Programming Language (STAPL), Jam, Jam Byte Code (JBC) object files.
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Product
MPEG Stream Monitor / Validator
TeleSight
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Real-Time validation including video and audio bitstream conformance, video quality, bitrate, and audio levels Supports up to 20 streams simultaneously. View real-time playback of all input channels simultaneously or zoom in on one (real-time playback performance is dependant on machine, number of streams, and content). Mix variety of inputs types. Mix variety of supported MPEG formats.
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Product
PLD ISP Feature, GTE 10.00p
K8220B
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The PLD ISP feature allows the test developer engineer to specify a configuration bitstream file in VCL digital test file, much like programming a Flash memory device. The PLD ISP feature supports multiple PLD configuration data formats are supported including. Serial Vector Format (SVF), Standard Test And Programming Language (STAPL), Jam, Jam Byte Code (JBC) object files.
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Product
Low-Power General Purpose FPGA
Certus-NX
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*Up to 39K logic cells, 2.9 Mb embedded memory, 56 18 x 18 multipliers, 192 programmable I/O, one lane of 5 Gbps PCIe, two lanes of 1.25 Gbps SGMII, two ADCs (each 12-bit, 1 MSPS).*Packages as small as 6x6 mm, and in ball-pitch options of 0.5 and 0.8 mm.*Power modes – User selectable Low Power vs. High Performance modes, enabled by FD-SOI programmable back-bias.*Design security – ECDSA bitstream authentication, coupled with robust AES-256 encryption.*Instant-on configuration – I/O configures in 3 ms, and full-device as fast as 8 ms.*Available in Commercial, Industrial and Automotive (AEC-Q100 qualified) temperature grades.
