Verification IP
test and verify SoC's protocols and interface buses.
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Verification IPs
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*AMBA AXI (AXI3, AXI4, Stream)*Open Core Protocol (OCP)*Advanced Peripheral Bus (APB)*Advanced High-performance Bus (AHB)
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MIPI Soundwire Total IP Solutions
Soundwire
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Soundwire is suited for small, cost-sensitive audio peripherals such as modern digital class-D amplifiers and digital microphones. The Total MIPI SoundWire IP Solution from Arasan enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code for Master and Slave, fully validated for compliance with the standard, a comprehensive test environment with a compliance suite for verification of the IP package, a SoundWire Hardware Development Kit (“HDK”) for FPGA prototyping, a SoundWire protocol analyzer and a complete SoundWire software stack.
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Emulation Platform
Veloce
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The Veloce® Emulation Platform dramatically reduces risk in the verification of today’s complex SoCs and is a core technology in the Mentor Enterprise Verification Platform™ (EVP). Mentor’s software and application solutions and continual enhancements enable a comprehensive verification environment for IP, chip, and system level verification.
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EBIRST 23 X SMB Verification Fixture
93-011-101
Verification Fixture
The 93-011-101 23 x SMB Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. Each tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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EBIRST 50-pin D-type Verification Fixture
93-005-101
Verification Fixture
The 93-005-101 50-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. Each tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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EBIRST 104-pin D-type Verification Fixture
93-022-101
Verification Fixture
The 93-022-101 104-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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EBIRST 78-pin D-type Verification Fixture
93-006-101
Verification Fixture
The 93-006-101 78-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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Functional Verification
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The Mentor Graphics Scalable Verification" is the most comprehensive EDA solution for functional verification, merging standards support, tools and a "design for verification" methodology to minimize verification cycles and costly design respins.
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Validation And Verification
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Development tools from Keil are quality assurance testedusing a number of commercial and in-house test suites.
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IP Gateway
SFT3508F/SFT3508F-10 (SFT3508F-M)
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Hangzhou Softel Optic Co., Ltd.
*8 Data ports ( SFT3508F/SFT3508F-M) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-7 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*10 Data ports ( SFT3508F-10) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-9 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*Support TS files uploading through Web management*Support IP anti- jitter function*Support adding scrolling caption, welcome words, boot image and boot video (this function is only applicable to IP out application and the STB/Android TV must be installed SOFTEL IPTV APK)*Support downloading SOFTEL IPTV APK directly from this device *Support about 80 HD/SD programs (Bitrate:2Mbps) When HTTP/RTP/RTSP/HLS is converted into UDP (Multicast),the actual application shall prevail, and suggest maximum 80% CPU utilization*Support program playing with APK downloaded android STB and TV, maximum 150 terminals
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HBM Verification Tester
HBM-VT
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High Power Pulse Instruments GmbH
- HBM pulse generator verification tester according ANSI/ESDA/JEDEC JS-001 up to ±10kV- To be used in HBM test and qualification labs for regular pulse generator specification compliance test in order to fulfill lab audit and certification requirements- Fully automatic compliance test and verification of HBM pulse generators regarding ANSI/ESDA/JEDEC JS-001 normative standard at 3 different load conditions: Short Circuit, 500 Ω, and a reference diode at VBR=15 V reverse breakdown voltage, including DC test- Parameter evaluation and verification of the transient HBM current waveforms: Peak Current, Rise Time, Decay Time, Maximum Ringing Current- Optionally available upgrade for all HPPI TLP-3010C, 4010C, 8010A, 8010C, HBM-TS10-A hardware systems in combination with HBM-S1-B (6kV) pulse generators (upgrade on request)- Fully automatic test report generation (PDF)- Electrically floating (no fixed system ground): The HBM loads, current sensor output, USB control interface and the enclosure are electrically floating. There is no limiting system ground which may introduce common-mode interference induced HBM current measurement errors.- Isolated industrial full-speed USB control interface- Isolated power supply derived from USB port- Compact size 126mm x 82.5mm x 44.5mm
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Hybrid Verification Platform
HES-DVM
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HES-DVM™ is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accuracy and speed-effective SoC emulation or prototyping models reducing test time and a risk of silicon re-spins.
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IP Networking
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We are the industry leader in IP Networking testing. We have a strong and wide-reaching industry reputation and participates in many industry organizations including the IETF, the IPv6 Forum, Open Networking Foundation and NetSecOPEN.
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Industrial IP Camera
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Leuze electronic GmbH + Co. KG
With industrial IP cameras, the visual monitoring of areas which are not accessible or difficult to access by plant operators is possible. Possible collisions are therefore avoided and troubleshooting simplified in case of failure. The robust cameras can also be used under harsh environmental conditions due to the industrial design.
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Field Testing & Verification Services
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TMD can assist your utility with virtually any metering-related product or service, and one of the most impactful services we provide is our field testing services.
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IP Surveillance
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In response to the enterprises’ crucial demand for security monitoring, PLANET IP Surveillance features H.265, H.265+ High Efficiency Video Coding (HEVC), AI face detection and recognition, along with AI-powered Video Analytics such as intrusion detection, cross line detection, loitering detection and more. Moreover, with PLANET’s user-friendly website management, NVR, Apps and free DDNS services, customers are able to monitor all devices remotely and easily.
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Matrix Code Verification Systems
REA MLV-2D
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The REA MLV-2D is a matrix- and barcode verifier which has been developed in conformance to international standards. The measurement uses defined angeles distance and illuminations to achieve repeatable results and quality information.
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Torque Verification
90229
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SDI’s 90229 is designed for calibrating tools used to apply torque including electric and pneumatic power tools, torque sensors, hand and click wrenches. The strain gage based reaction torque sensors in the bench-mount housing remain stationary while torque is applied. The housing dis-assembles by removing two snap pins, allowing the user to easily change socket sizes and capacities.
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Pegasus Verification System
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The Cadence® Pegasus® Verification System is a cloud-ready physical verification signoff solution, which enables engineers to deliver advanced-node integrated circuits (ICs) to market faster. The groundbreaking technology delivers up to 10X improved performance on DRC runs and reduces turnaround time from days to hours.
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PCI Express IP
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Rambus silicon-proven, high-performance PCI Express® (PCIe®) 6.0, 5.0, 4.0 and earlier generation digital controllers are optimized for use in SoCs, ASICs and FPGAs. These market-leading solutions for high-performance interfaces address AI/ML, data center and edge applications.
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AV Over IP
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A high-performance platform that transmits ultra-high-definition video, audio, USB, and control signals over standard 1-Gigabit Ethernet networks.
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IP code Testing
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Educated Design & Development, Inc.
Ingress Protection Test Equipment is used to determine the degree of protection provided by a product enclosure. The level of protection provided by an enclosure is represented by an "IP" code (i.e. IP43). The first digit indicates protection against ingress of solid foreign objects. Many of these tests require accessibility probes. The equipment for these tests is provided below. All equipment fully complies with IEC 60529 (IP Code standard) and all other international standards with similar tests.
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Truck Mounted Static Grounding Verification
Earth-Rite MGV
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The Earth-Rite Mobile Ground Verification system (MGV) is a unique, patented technology designed to provide automatic confirmation of a positive electrostatic ground connection for trucks collecting and transferring flammable / combustible products.
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SoC Signoff & Structural Verification
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Defacto’s STAR augments existing RTL verification flows by providing fully automated structural checks. Users can also define and build their custom checks.
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IP Solution
eMMC 5.1
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Demand for mobile content capacity and bandwidth for video, pictures and music is ever increasing. To address this demand in the next generation of smartphones, tablets, and portable devices, the eMMC 5.1 Specification from JEDEC, improves the current HS400 speeds operating at 3.2Gbps, with "command queuing" making the data transfers highly efficient by offloading the software overhead into the controller. eMMC 5.1 further improves the reliability of operation by utilizing an "enhanced strobe" at the PHY layer. The eMMC5.1 is backward compatible with the existing eMMC 4.51 and eMMC 5.0 Devices.
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Vision Standard IP Cores
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S2I’s Vision Standard IP Cores solutions are delivered as a working reference design along with FPGA IP cores. This minimizes development time and allows for top-notch performance at a small footprint, while leaving enough flexibility to customize the design. Sensor to Image cores are compact and leave enough space in the FPGA for your application.
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End Point IP Core
PCIe
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The highly configurable PCIe End point IP core supports x1, x2, and x4 lane with a selection of 32/64-bit data path. Depending on design requirements, a maximum of 8 VCs and 8 TCs are supported. The IP core consists of many useful features that can be included to enhance system performance and to address special design needs in different applications. The data link layer allows the configuration of infinite credits to boost the flow control efficiency. By-pass mode, cut-through mode, and store-and-forward mode are other optional items. The transport layer features include configurable ECRC generation and checking, support for up to 64 configurable outstanding non-posted requests, and configurable payload size from 128 to 4 Kbytes
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LSI Functional Verification Services
SpecInsight
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The keys to functional verification are “verification strategy” and “highly complete verification item extraction.” Our functional verification services emphasize highly complete verification item extraction while also generating test benches and functional scenarios, random verification, and even functional coverage to meet customer demands by providing these services from a wide variety of angles. By implementing functional verification on the RTL and C models designed by customers from a third-party perspective, we improve quality of customers’ circuits.
