JTAG Technologies Inc.
We are a solutions company specializing in PCB assembly testing, fault diagnosis and device programming. We develop innovative products built upon boundary-scan (IEEE Std 1149.x) standards and supply our software and hardware products and services world-wide.
- 877 FOR JTAG
+31 (0) 40 295 0870 - +31 (0) 40 246 8471
- info@jtag.com
- Boschdijk 50
Eindhoven, 5612 AN
Netherlands
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Mixed Signal JTAG Tester
JT 5705
The JT 5705 series offer a unique combination of JTAG TAP controller (tester) interfaces plus digital and analog I/O in compact desktop package.Use the ‘mixed-signal’ features to measure power supplies, clock frequencies or test DACs and ADCs. Add your own capability through use of CoreCommander FPGA our generic bridge/translator system.
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Training Board
The JT 2156 training board has been devised to demonstrate all the latest features and test techniques available to users of JTAG Technologies’ ProVision & JTAG Live application development systems. As well as a modern ARM Core processor, the design also includes an Altera Cyclone FPGA, DDR Memory, Ethernet PHY, and several SPI and I2C peripheral parts. The JT2156 is shipped with a comprehensive self-study manual for getting to know the in-depth features of ProVision and/or JTAGLive Studio. For Altium users the design also serves as an example of how to adapt the Nano board into a realistic custom design.
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Production Stand-Alone
PSA
Using PSA, test engineers can build sequences of applications in the built-in AEX (Application EXecutive) manager using if then else goto capabilities. Sequence builders can also include additional capabilities through DOS/Win command line calls, create serial number logged test reports, export tests results to a database etc.. PSA includes drivers for all JTAG Technologies controller hardware past or present.
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JTAG Visualizer
JTAG Visualizer is an advanced graphical viewer and data management system for PCB schematics and layouts. Visualizer integrates seamlessly with the JTAG Technologies family of boundary-scan products, such as the ProVision application development platform, and accepts PCB data from a variety of CAD, CAM and EDA tools. In design Visualizer provides DfT (design for test) feedback to the user by enabling a graphical view of fault coverage on their design. In manufacture and test Visualizer can be used to highlight faulty nets (short circuits, opens, stuck-ats etc.) in both layout and schematics views.
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32 Channel Multi-Purpose DIOS/TAP Modules/Interfaces for Spare JT 2148 QuadPOD Transceiver Slot
JT 2149/MPV eMPV
The JT 2149/MPV and the JT 2149/eMPV are a 32 channel multi purpose DIOS/TAP pod modules/interfaces that can be plugged into any spare JT 2148 QuadPOD transceiver slot. The DIOS channels of these units I/O interface pods enable increased fault coverage and thus improved diagnostic resolution during boundary-scan testing. The principal difference between the two versions is the use of an extended case on the eMPV that allows standard 0.1″ connections to be used to access ths TAP and static IO signals (see tab below)- on the standard /MPV unit these signals are available at the front face 0.05″ connector. The units are fully supported by JTAG Technologies’ development tools. Additional DIOS modules can be serially connected if more parallel access points are required.
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DataBlaster PCI / PCIE JTAG Boundary-Scan Controller
JT 37x7/PCI
High speed and performance JTAG Boundary-scan PCI PC plug-in controller for PCI bus slot or PCIe PC plug-in controller for PCI Express bus slot.The controllers are targeted at demanding manufacturing test applications, fast in-system flash memory programming and programmable logic configuration. The JT 37×7 is available in different operating levels (memory options) to suit your specific environment and application. Each unit is supplied with a four TAP port signal conditioning module the JT 2147 ‘QuadPOD‘
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19" Rack Mount Chassis, Industrial JTAG-Powered PCB Tester-Programmer 'CombiSystem'
JT 57××/RMIC
The new-concept, industrial JTAG-powered PCB tester-programmer the JT 57xx/RMIc ‘CombiSystem’ comprises a sleek base-level 19″ rack-mount chassis assembly that can house up to four customer-specified modules chosen from various JTAG (IEEE 1149.x) controllers, digital IO and analog IO and other measurement modules.
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QuadPOD Conditioning Interface
JT 2147/VPC
The JT 2147/VPC is a variant of the JTAG Technologies QuadPOD signal conditioning interface specifically designed for use within Virginia Panel Corporation’s mass interconnect interface. The unit integrates both the JT 2148 transceiver circuitry, two independent, programmable TAP modules (of type JT 2149) and two TAP modules with I/O (of type JT 2149/MPV) on a single board that interfaces via the VPC QuadraPaddle connectors type G20x or G14x.
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Flex Socket Test Module
JT 2127/Flex Socket Test Module
The JT 2127/Flex STM memory socket tester is a family of hardware adapters specifically designed for the testing of of PCB-mounted DIMM & SODIMM sockets using a JTAG/boundary-scan controller and supporting software. The testing of memory sockets has always been troublesome for test and production engineers using JTAG/boundary-scan systems. Even when it is possible to create memory writes/reads from a boundary-scan compliant access device on the UUT (Unit Under Test), the initialization process may fail leaving you with little diagnostics information. What’s more it can still be uncertain whether fault lays with the DIMM module itself or the socket. Using the new JT 2127-Flex system from JTAG Technologies you get pin-point diagnostics from a known-good test interface so you can be certain that your socket is soldered correctly.
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DDC (Dual DIMM Carrier) DIOS Adaptor
JT 2702/DDC
The JT2702 Digital 256 channel JTAG I/O module. JT2702/DDC (Dual DIMM Carrier) is a DIMM DIOS accessory product. It is typically used in custom test adapters or fixtures where a large number of digital I/O channels are required with a minimum space overhead.
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64-Channel Boundary Scan Digital I/O Scan Module
JT 2111/MPV DIOS DIN
The JT 2111/MPV is a 64 channel boundary-scan digital I/O scan module enclosed in an impact resistant housing. The module is designed to test and control edge connectors, on-board connectors and logic clusters in boundary-scan applications. Multiple modules can be connected serially to increase the number of I/Os. Available with 96-pin DIN 41612 connectors and 20-pin 0.1″ pitch IDC connectors.This JT2111/MPV DIOS module is also available through our webshop.
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CoreCommander
While many ICs are equipped with a JTAG (IEEE Std. 1149.1) boundary-scan register (BSR), a significant number of microprocessors and DSPs can be found with deficient or even non-existent BSRs. CoreCommander Micro uses the on-chip debug mode of processors to access ports and embedded peripheral controllers to promote ''kernel-centric'' testing. Similarly, in the case of today's Field Programmable Gate Arrays (FPGAs) test engineers can ''bridge'' from the JTAG interface to the resources of the gate array itself. Our CoreCommander FPGA product implements a translatorinterface that allows our JTAG hardware to control embedded IP cores via a variety of bus interfaces (e.g. Wishbone Avalon etc.).
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JTAG Functional Test
JFT
JFT comprises a series of software modules that support boundary-scan test and programming activities under Python, National Instruments LabVIEW and Microsoft .NET framework. Using JFT users can create JTAG/boundary-scan test application scripts, VIs or programs for PCB assemblies and systems that control individual driver/sensor pins, groups of pins declared as variables or register bits. These applications are typically used to test logic devices or mixed signal clusters and can also be transformed into re-usable test 'modules'. Pairing JFT with JTAG CoreCommander emulative test modules gives an effective, low-cost system for performing tests through embedded device peripherals (ADCs, Memory Controllers etc..)
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USB Explorer (Two Port)
JT 3705
The JT 3705/USB Explorer is a low-cost two port USB powered boundary-scan controller interface specifically suited for low volume testing and in-system programming of (C)PLDs. Explorer supports two fully-compliant boundary-scan test access ports (TAPs) which can be synchronized for test purposes.